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Cover of ASIC and FPGA Verification

ASIC and FPGA Verification

A Guide to Component Modeling

by Richard Munden

Morgan Kaufmann Publishers · 2004 · Hardcover

₹4,369

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About this book

<div class="book-description"> <h2 style="font-size:1.1rem;font-weight:700;margin-bottom:12px;">About the Book</h2> <p style="margin-bottom:12px;line-height:1.7;">Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today's digital designs.</p> <p style="margin-top:12px;font-size:0.9rem;color:#666;">ISBN: 9780125105811</p> </div>

Book details

ISBN-13
9780125105811
ISBN-10
0125105819
Author
Richard Munden
Publisher
Morgan Kaufmann Publishers
Published
2004
Series
The Morgan Kaufmann series in systems on silicon
Binding
Hardcover
Pages
336
Language
English
Condition
New
Subject
ICs & Chip Design

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