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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard

Name: Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard
Brand: Springer
SKU: 9781402072352
Price: 5329.00 INR
Availability: InStock

by Nicola Nicolici, Bashir M. Al-Hashimi

Springer · 2003 · Hardcover

A Springer guide to the IEEE 1149.4 test standard, looking at why power dissipation during testing must be managed in VLSI circuits. For chip design and test engineers.

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About this book

Reducing power dissipation in very large scale integrated (VLSI) circuits matters for reliability and for keeping packaging costs down. Much earlier work has looked at power during normal, functional operation. This book focuses on the power drawn during testing.

The authors treat test-mode power as a problem in its own right, since test activity can be substantially higher than during functional operation. Their guide to the IEEE 1149.4 test standard sets the context for testing under power limits.

It suits engineers and researchers working on integrated circuit testing. It is published by Springer, ISBN-13 9781402072352.