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Cover of Logic Design and Verification Using SystemVerilog

Logic Design and Verification Using SystemVerilog

by Donald Thomas

Createspace Independent Publishing Platform · 2016

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About this book

Logic Design and Verification Using SystemVerilog is written by Donald Thomas. This edition from Createspace Independent Publishing Platform (2016) has 336 pages.

Topics covered include SystemVerilog (Computer hardware description language), Electronic circuits and Computer hardware description languages.

About the author: D. E. Thomas (born 1951).

Book details

ISBN-13
9781523364022
ISBN-10
1523364025
Author
Donald Thomas
Author dates
D. E. Thomas (born 1951)
Published
2016
Pages
336
Language
English
Condition
New
See all