
Hierarchical Modeling for VLSI Circuit Testing
Debashis Bhattacharya, John P. Hayes
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89
by Debashis Bhattacharya, John P. Hayes
Springer · 1989
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Hierarchical Modeling for VLSI Circuit Testing: 89 is written by Debashis Bhattacharya & John P. Hayes. This edition from Springer (1989) has 160 pages. It belongs to the The Kluwer international series in engineering and computer science series.
Topics covered include Computer simulation, Integrated circuits, Testing and Very large scale integration.
About the author: Debashis Bhattacharya (born 1961).