Hierarchical Modeling for VLSI Circuit Testing
Debashis Bhattacharya, John P. Hayes
₹8,096
Hierarchical Modeling for VLSI Circuit Testing
89
by Debashis Bhattacharya, John P. Hayes
Springer-Verlag New York Inc. · 2011
₹7,744
Free delivery. Nothing extra to pay at checkout.
- Delivery in 3–7 days to any serviceable pincode in India, with tracking.
- Cash on delivery. Pay when the parcel reaches you.
- 15-day returns. See what qualifies.
About this book
Published by Springer-Verlag New York Inc. in 2011, Hierarchical Modeling for VLSI Circuit Testing: 89 by Debashis Bhattacharya & John P. Hayes runs to 160 pages.
Topics covered include Computer engineering, Computer-aided design and Computer science.
Book details
- ISBN-13
- 9781461288190
- ISBN-10
- 1461288193
- Authors
- Debashis Bhattacharya, John P. Hayes
- Publisher
- Springer-Verlag New York Inc.
- Published
- 2011
- Edition
- Softcover reprint of the original 1st ed. 1990
- Pages
- 160
- Language
- English
- Condition
- New
- Subject
- Computer-aided design
More by Debashis Bhattacharya and related titles
Heterogeneous Multicore Processor Technologies for Embedded Systems
Kunio Uchiyama
₹3,047
Realistic Architectural Visualization with 3ds Max and Mental Ray
Roger Cusson, Jamie Cardoso
₹3,064
Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
Ruijing Shen
₹2,917
Cad
Rudolf Koller
₹3,143
Omnigraffle 5 Diagramming Essentials
Ruben Olsen
₹4,531
Verilog Coding for Logic Synthesis
Weng Fook Lee
₹11,904
VHDL Coding Styles and Methodologies
Ben Cohen
₹10,673
The MPEG Representation of Digital Media
Leonardo Chiariglione
₹7,774
Principles of CAD
A. J. Medland
₹5,519
Large-Scale Scientific Computing
Ivan Lirkov, Svetozar D. Margenov, Jerzy Wasniewski
₹5,737
Analysis and Design of Univariate Subdivision Schemes
Malcolm Sabin
₹3,048