
Verification by Error Modeling
Zeljko Zilic, Katarzyna Radecka
₹6,631

2
by Robert K. Brayton, Gary D. Hachtel, C. McMullen, Alberto L. Sangiovanni-Vincentelli
Springer · 1984
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Published by Springer in 1984, Logic Minimization Algorithms for VLSI Synthesis: 2 by Robert K. Brayton, Gary D. Hachtel & others runs to 194 pages. It belongs to the The Kluwer international series in engineering and computer science series.
The book deals with Logic design, Algorithms, Data processing and Very large scale integration.